Most modern business enterprises use relatively complex computer and telecommunications networks. The design, installation and maintenance (including upgrading) of such systems are challenging tasks for the system designer and the system administrator. A particular system that is prevalent in modem networks is a data storage system, and a particular subclass of data storage systems is a disk drive array (or more simply, disk array).
Disk arrays are often used for large data storage and management applications. Some disk arrays can also store back-up copies of each file, increasing raw storage capacity requirements, system complexity, and data processing requirements. Typically, a disk array consists of one or more controllers directing input-output (I/O) operations and data flow to disks and to cache memory from a plurality of computers. Complex disk arrays may provide several layers of controllers and cache memory. Multiple hard disk drives and associated driver software-firmware, and other well known modules that implement basic functions in the data path (e.g., parity calculation engines, direct memory access (DMA) engines, buses, bus bridges, communication adapters for buses and external networks, and the like) form a relatively complex system.
FIG. 1 is a simplified schematic block diagram for a typical disk array 100. Data flow is indicated generally by dashed lines, demonstrating that a host computer A (105A) uses the left part of the array having four disk drives 135–150, and a host computer B (105B) uses the right part of the array having four disk drives 155–170. The host computers 105A and 105B connect to controllers 115A and 115B via interconnects 110A and 110B, respectively. The disk drives 135–170 so arrayed are connected to the controllers 115A and controller 115B, each having a respective cache memory 120A and 120B. An upper bus 125 and a lower bus 130 connect the disk arrays 135–150 and 155–170 to the controllers 115A and 115B. The upper bus 125 connects the disk drives 135 and 140 and the disk drives 155–160. The lower bus 130 connects the disk drives 145–150 and the disk drives 165–170.
The disk drives 135–170 may be arranged as one or more logical unit (LUs). An LU is any subset of the storage space in the entire array. An LU may be a fraction of a disk, multiple whole disks or anything in between. When LUs are employed, the host computers 105A and 105B do not store data directly into the arrays, but into associated LUs.
The disk array 100 may comprise redundant arrays and/or partitioned arrays. In a redundant array, for example, the upper half disk drives 135–140 and 155–160 may mirror the lower half disk drives 145–150 and 165–170. In a partitioned scheme, the upper half of the array (on the bus 125) may handle half the workload from the hosts A and B at any given time while the lower half of the array (on the bus 130) handles the other half of the workload.
Due to complexity, it is difficult to predict or optimize the performance of a storage array. There is a large range of workloads that can conceivably run on any given storage array, making the performance prediction of disk arrays difficult. Small variations in the system's parameters or the workload's parameters can have very significant impact on the storage array performance. For example, I/O operations can be directed to random locations on the LU generating much disk head re-positioning activity or could be sequential with little disk head re-positioning activity. Just as importantly, correlations between input-output operations can significantly impact performance; for example, if two sequential workloads are active simultaneously (e.g., to scan two database tables simultaneously), operating on the same LU, the degree of sequentiality observed on the disks might be significantly lower than if only one of them were active. Unfortunately, predicting performance of data storage arrays for a given workload is not well understood in the current state of the art. System administrators typically rely on simple rules of thumb to make array configurations and purchase decisions. Generally, the selected solution is to over-provision the system (e.g., two to five times the estimate) in order to guarantee desired performance.
One conventional approach for predicting system performance is based on empirical testing of actual systems. This approach involves building actual systems case-by-case to empirically test performance for an expected workload by trial and error. Although this approach is quite expensive and time intensive, it is nonetheless often the method employed to demonstrate the viability of a proposed system.
Another conventional technique for performance prediction uses monolithic system array modeling, looking at a proposed entire system's performance, paying little attention to the internal structure at the individual device level. Such modeling is described, for example, in E. K. Lee and R. H. Katz, An Analytic Performance Model of Disk Arrays, International Conference on Measurement and Modeling of Computer Systems (SIGMETRICS), 1993, pp. 98–109 (ACM 0-89791-581-X/93/0005/0098). Monolithic system array modeling is a labor-intensive process, requiring extensive empirical data gathering and analysis. Moreover, the research and development at the monolithic system level is seldom reusable to devise a new model for a new array and workload specification. Monolithic system array modeling does not take advantage of the fact that different systems can have common components.
A third conventional approach for performance modeling is detailed computer simulations, where the operation of a disk array is broken down into individual operations, each of which are then executed in a computerized simulation. Unfortunately, such simulations require high levels of individual component detail and workload detail, making them costly and time consuming to develop and to use.
A fourth approach is the composite device modeling method described in E. Shriver et al., An Analytic Behavior Model for Disk Drives with Readahead Caches and Request Reordering, International Conference on Measurement and Modeling of Computer Systems (SIGMETRICS), 1998, pp. 182–191 (ACM 0-89791-982-3/98/0006), which is hereby incorporated by reference. This approach constructs a model for a storage device by composing models of its component parts. Component models operate as workload transformations, meaning that a component transforms characteristics of an input workload into that of an output workload, which is an input workload for a subsequent component. Though useful, this approach is limited in several respects. First, the approach has been applied only to disk drives, not disk arrays, which are far more complex systems of interconnected components. Second, the approach models components as single output transforms, not multi-output transforms. Third, the approach predicts latency only (i.e., how long it takes to service I/O requests), not throughput or other performance metrics that are limited by system constraints.